FPGA-based sigmoid function implementation achieves high accuracy with low hardware use

Researchers have developed a new hardware-efficient method for implementing the sigmoid activation function on FPGAs. This approach utilizes a mixed-radix CORDIC algorithm, combining radix-2 and radix-4 iterations for faster convergence and reduced hardware overhead. The implementation on a Xilinx Virtex-7 FPGA achieved a low logic slice count and minimal DSP usage, demonstrating a mean absolute error competitive with existing sigmoid implementations. AI

Summary written by gemini-2.5-flash-lite from 1 source. How we write summaries →

IMPACT Offers a more efficient hardware implementation for deploying neural networks on resource-constrained edge devices.

RANK_REASON Academic paper detailing a novel hardware implementation of a common neural network activation function.

Read on arXiv cs.AI →

• FPGA
• Sigmoid function
• CORDIC
• Xilinx Virtex-7
• Xilinx

• paper
• infra